|
|
|
|
Finite Element Analysis
During in-circuit testing often thousands of probes are contacting the bottom of the
circuit board, while densely populated boards may also have topside probing. These
unintended high probe forces may cause:
- Fractured solder joints
- Lifted pads or traces
- Cracked components
- Delamination of the PCB
|
|
|
|
|
|
|
What can be done to prevent this type of damage during the testing process?
- Has it been established that the test probes are not over stressing
your circuit board during test?
- Was your fixture designed to dissipate the test contact forces?
- Are the probe forces around critical components at a safe limit?
|
|
|
|
|
|
|
|
Standard example of strain on a PCB before an FEA
|
|
|
A proactive process is available
Circuit Check uses an industry leading 3D Finite Element Analysis software
program with extensive customization capable of modeling both the unit under test
and test fixture. Unlike others, we are able to easily pin point excessive strain
on any of the model's surfaces and offer solutions to correct the issues.
Our FEA provides a proactive solution that is used as one more design verification
tool during the engineering cycle. The FEA report uses industry standard measurements
for traceability to IPC/JEDEC 9704.
|
|
|
|
